The PMT analogic signals from both the left and right side of the CED/FPD detectors arrive in the CED/FPD Splitter modules. For each detector, the left and right signals go to an ADC located in theFastbus crate and to a Constant Fraction Discriminator (CFD) located a DMCH module. the outputs of the DMCH modules are the CFD logic signals which are sent to a TDC located in theFastbus crate and the Mean Timer (MT) logic signals which are sent to a Splitter/Trigger module. A MT signal is the mean time between the two CFD signals of a given detector. An internal delay may be adjusted in the DMCH modules for each MT signals to get them on time. The inputs of a Splitter/Trigger module are the MT logic signals of all of the CED and FPD which belong to the same octant. Each MT signal is splitted 4 times. One goes to a TDC located in theFastbus crate, two go to a coincidence module (one for the pion coincidences and one for the electron concidences) and one is used for the trigger logic. A trigger signal is finally sent from the Splitter/Trigger module to the coincidence module (one module per octant). Each coincidence module is made of two similar part, one for the electrons (the trigger is validated by a signal coming from the Cerenkov electronic) and one for the pions (the trigger is not validated by the Cerenkov).
 
 

CED/FPD splitter modules

• CED/FPD splitter modules are located at the top of the electronic racks.
• The position of the modules as well as the detailled mapping of their outputs (going to the DMCH modules) can be found here.

DMCH modules

• The position of the DMCH modules in the VXI Crate can be found here.
• The detailled mapping of the input/output signals for one module can be found here.
• DMCH modules hold a constant fraction discriminator for each CED/FPD PMTs and calculate the mean time between the left and right PMT signals of each detector. The input signals come from the CED/FPD splitter modules. The outputs are the logical mean timer signals going to the Splitter/Trigger modules.
• You can adjust by soft the threshold of individual PMTs and a delay to individual mean timer signals.
• The DMCH settings can be adjusted with the scripts g0daq_config.pl (for everybody) and dmch_config2 (only for experts). These scripts can be found on gzerol3 in the directories /home/gzero/g0backward/scripts/g0daq_config/. and /home/gzero/g0backward/scripts/dmch_config2/. respectively.
• With the script g0daq_config.pl you can only adjust a common threshold for each PMTs and load an existing configuration file.
• With the script dmch_config2 you can adjust individual PMT thresholds as well as individual delays for mean timer signals. It offers also the possibility to set a common threshold or a common delay for all FPDs or CEDs of a given octant. Finally, it offers the possibility to load the delay values coming from the timing adjustment of CEDs and FPDs from the specific files located in the directory /home/gzero/g0backward/Setting/dmch/TimingResults/.
• Each module also fill single-hit scales holding counting rates of individual PMTs at discriminator output.
• The reading of scales will be made through the VXI bus according to the MPS signal which arrive at the rear of the VXI crate.

• The 4 Splitter/Trigger modules (1 per octant) are ordered in octant number from right to left in the VME crate (module for octant 2 is at the right position).
• The description of the front panel of a Splitter/Trigger module (with inputs/outputs and potentiometers) can be found here.
• Inputs are the mean timer signals coming from the DMCH modules. These signals are splitted several times and sent to the FastBus crate and to the coincidence modules. The mean timer signals are also used for the logic of the trigger.

• The mean timer signals are duplicated 3 times.
• A delay (21, 28 or 35 ns) can be adjusted inside the module for each of the 3 outputs (see the report on the Splitter/Trigger modules)
• The outputs named "ORA" ("ORB") return the logical "or" of the CED (FPD) mean timer signals. These outputs MUST be continuously loaded by 50 ohm terminator. If not the "FAST CLEAR" output signal can be affected.
• The outputs named "MULTA" ("MULTB") return the multiplicity of CED (FPD). These signals have amplitude of 50 mV / step under 50 ohms load.
• The width of the multiplicity signals can be adjusted from 16 ns to 134 ns with the front panel potentiometer “MULT WIDTH”. By default, adjust the width to 20 ns.
• The multiplicity threshold for CED (FPD) is regulated by the front panel potentiometers "LEVEL MULT A" ("LEVEL MULT B"). (Roughly 2 turns of the potentiometer are equivalent with a multiplicity.) By default adjust the threshold to get multiplicity = 1.
• The outputs named "TRIGA" ("TRIGB") return the multiplicity signal above the threshold.
• The outputs named "TRIG0" and "TRIG1" return the trigger signal.
• the trigger signal is the logical AND of  either "OR A" and "OR B" or "MULTA" and "MULTB" depending on a switch inside the modules. By default put the switch to have the logical AND of "MULTA" and "MULTB".
• An internal switch can be used to have or not an adjustable trigger width or directly the width corresponding to the input signals (2 switch, one per trigger output). By default, put the switch to have an adjustable trigger width for both "TRIG0" and "TRIG1".
• If the switchs previously mentionned are well put, the width of the trigger outputs can be adjusted from 3 ns to 95 ns with the front panel potentiometer “TRIGGER WIDTH”. By default, adjust the width to 8 ns.
• Another internal switchs can be used to have a NIM or TTL trigger output level. The choice can be different for "TRIG0" and "TRIG1". By default, put the switchs to have a NIM level for both outputs.
• The "FAST CLEAR" output returns the logical OR of "ORA" and "ORB" signals.

Coincidence modules

• The 4 Coincidence modules (1 per octant) are ordered in octant number from right to left in the VXI crate (module for octant 2 is at the right position).
• The description of the front panel of a Coincidence module can be found here.
• Inputs are the mean timer and trigger signals coming from the Splitter/Trigger modules and the Cerenkov validation/veto signals.
• The mean timer and trigger signals must arrive at the same time (within ns).
• The Cerenkov validation/veto signals must arrive between 15 ns and 42 ns after the trigger.
• The validation/veto signals coming from the Cerenkov electronic can be disabled by software with the script g0daq_config.pl which can be found on gzerol3 in the directories /home/gzero/g0backward/scripts/g0daq_config/.
• Each module fill 2 set of single-hit, coincidence and multi-hit scales (one conditionned by the Cerenkov validation signal and the other conditionned by the Cerenkov veto signal):
• D (Direct): counting rates of individual CED (FPD) at the input of the module.
• NCD (Non Conditionned Direct counter): counting rates of individual CED (FPD) in coincidence with the trigger (the width of the trigger window can be adjusted in the Spitter/Trigger modules).
• CD (Conditionned Direct counter): counting rates of individual CED (FPD) in coincidence with the trigger (the width of the trigger window can be adjusted in the Spitter/Trigger modules) and with the Cerenkov validation (veto) signal.
• COINC: counting rates of CED-FPD coincidences conditionned by the trigger and the Cerenkov validation (veto) signal.
• MULT12: counting rates of  1CED&2FPD and 2CED&1FPD conditionned by the trigger and the Cerenkov validation (veto) signal.
• MULT22: counting rates of  2CED&2FPD and more conditionned by the trigger and the Cerenkov validation (veto) signal.
• The Cerenkov validation signal come from the Cerenkov electronic.
• We decided to put a constant signal in the Cerenkov veto input such that the scales conditionned by the Cerenkov veto hold all events and not only pions.
• The read of scales will be made through the VXI bus according to the MPS signal which is generated at the rear of the VXI crate by an electronic card located on the right of the Coincidence modules (in the same crate). The documentation for this card can be found here or in gzerol3 in the directory /home/gzero/g0backward/documents/. Four different MPS signals can be generated. The choice is made with the script g0daq_config.pl. By default, set "Extern ROC3":
• Intern 30 Hz: 30 Hz signal generated by the electrinic card itself.
• Intern 120 Hz: 120 Hz signal generated by the electronic card itself.
• Extern ROC3: the signal is taken at the rear of the VXI crate holding the DMCH modules.
• Extern Beam: external signal entered at the front end of the electronic card.
• Each module has also on his front end several coaxial connectors (LEMO type) for the input/output control (expert mode). See the documentation for more detail. This documentation can also be found on gzerol3 in /home/gzero/g0backward/documents/. Some of these signals are driven by software with the script g0daq_config.pl (only for expert).

• FastBus crate is located at the bottom of the electronic racks.
• The position and the mapping of the ADC and TDC modules can be found here.

Inputs of ADC modules:

• PMT signals coming from the CED/FPD splitter modules
• PMT signals coming from the Cerenkov Splitter/Sommator

Inputs of TDC modules:

• Discriminator signals associated to the CED/FPD PMTs and coming from the DMCH modules
• Mean timer signals of CEDs and FPDs, coming from the DMCH modules
• CED/FPD trigger signals coming from the Splitter/Trigger modules
• Discriminator signals associated to the Cerenkov PMTs
• Discriminator signals (1 per octant) associated to the sum of analogic signals of the four Cerenkov PMTs
• Cerenkov trigger signals (1 per octant) coming from the Cerenkov electronic